The present invention relates in general to vertical field effect transistors (FETs). More specifically, the present invention relates to vertical FETs with improved reliability.
Vertical-type transistors such as vertical FETs (VFETs) can achieve a reduced FET device footprint without compromising FET device performance characteristics. In vertical FETs the source-drain current can flow in a direction perpendicular to a substrate surface. For example, the substrate surface can be made horizontal, and the vertical FET can be a vertical pillar with the drain and source being the top and bottom portion of the pillar.